Experience
Sterne, Kessler, Goldstein & Fox, P.L.L.C., Washington, D.C.
Director, January 2014 - Present
Associate, March 2008 - December 2013
Student Associate, May 2005 - February 2008
Extensive experience handling patent prosecution matters, including preparation of new applications, replies to office actions, reexamination requests, appeals, and petitions practice. Work with inventions in areas comprising software, computer architecture, digital systems, and databases. Work closely with examiners by conducting in-person interviews at the USPTO to ensure prosecution remains on-track and clients receive allowances for their claimed inventions in a timely manner.
George Mason University School of Law, Arlington, VA
Adjunct Professor, August 2012 - Present
Law 351: Patent Writing Theory and Practice (Fall Semester)
General Dynamics, Advanced Information Systems, Fairfax, VA
Sr. Software Engineer, January 2004 - May 2005
Design and implement display software for a tactical control system employed on several classes of US Navy submarines. Projects include the design and implementation of various graphical components, an alerts system, and a communications channel for passive broadband data using CORBA, among others. Code in C++ on Linux systems. Received the "Excellence Award", Jan. 2005.
Georgia Institute of Technology, Atlanta, GA
Graduate Research Assistant, January 2003 - December 2003
Graduate Teaching Assistant, August 2002 - December 2002
Assisted in teaching an introductory computer engineering course in logic design. Held regular office hours for 40+ students. Worked subsequent semesters as a Research Assistant developing state-of-the-art high throughput, short pulse width optical data modules with Xilinx FPGA hardware and PECL for use in high-speed testing applications.
Digital System Resources, Inc., Fairfax, VA
Summer Intern - Systems Engineer, May 2001 - August 2001
Configured, troubleshot, and supported Compaq 8-way SMP units, FDDI networks, and various systems running RedHat Linux, HP-UX, and Solaris. Held Secret security clearance.
Director, January 2014 - Present
Associate, March 2008 - December 2013
Student Associate, May 2005 - February 2008
Extensive experience handling patent prosecution matters, including preparation of new applications, replies to office actions, reexamination requests, appeals, and petitions practice. Work with inventions in areas comprising software, computer architecture, digital systems, and databases. Work closely with examiners by conducting in-person interviews at the USPTO to ensure prosecution remains on-track and clients receive allowances for their claimed inventions in a timely manner.
George Mason University School of Law, Arlington, VA
Adjunct Professor, August 2012 - Present
Law 351: Patent Writing Theory and Practice (Fall Semester)
General Dynamics, Advanced Information Systems, Fairfax, VA
Sr. Software Engineer, January 2004 - May 2005
Design and implement display software for a tactical control system employed on several classes of US Navy submarines. Projects include the design and implementation of various graphical components, an alerts system, and a communications channel for passive broadband data using CORBA, among others. Code in C++ on Linux systems. Received the "Excellence Award", Jan. 2005.
Georgia Institute of Technology, Atlanta, GA
Graduate Research Assistant, January 2003 - December 2003
Graduate Teaching Assistant, August 2002 - December 2002
Assisted in teaching an introductory computer engineering course in logic design. Held regular office hours for 40+ students. Worked subsequent semesters as a Research Assistant developing state-of-the-art high throughput, short pulse width optical data modules with Xilinx FPGA hardware and PECL for use in high-speed testing applications.
Digital System Resources, Inc., Fairfax, VA
Summer Intern - Systems Engineer, May 2001 - August 2001
Configured, troubleshot, and supported Compaq 8-way SMP units, FDDI networks, and various systems running RedHat Linux, HP-UX, and Solaris. Held Secret security clearance.
Education
George Mason University School of Law, Arlington, VA
Juris Doctor, Intellectual Property Law Track, December 2007
Georgia Institute of Technology, Atlanta, GA
Master of Science, Electrical and Computer Engineering, December 2003
Coursework: Adv. Computer Architecture, Parallel and Distributed Computer Architecture, Adv. VLSI Systems, High Performance Parallel Computing, Digital MOS ICs, Random Signals
Projects: Cache Coherency Protocol Simulator, AbsHDL Design and Formal Verification of Five-Stage Pipelined Processor, Real-Time Data Manipulation with IXPs, Raytracing, VLSI Design of an Arithmetic Logic Unit
Virginia Polytechnic Institute and State University, Blacksburg, VA
Bachelor of Science, Computer Engineering, May 2002
Minor in Mathematics, Minor in Computer Science
Honors: Dean's List: Fall 1999, Spring 2000, Fall 2000; Pratt Engineering Scholar; Gilbert and Lucille Seay Scholar (2 years); member of Eta Kappa Nu Electrical and Computer Engineering National Honor Society; member of Phi Eta Sigma National Honor Society; member of Golden Key International Honor Society; member of the National Society of Collegiate Scholars
Coursework: Embedded System Design, Microprocessor System Design, Digital Design I/II, Operating Systems, Data Structures and Files, Object Oriented Software, Computer Organization
Juris Doctor, Intellectual Property Law Track, December 2007
Georgia Institute of Technology, Atlanta, GA
Master of Science, Electrical and Computer Engineering, December 2003
Coursework: Adv. Computer Architecture, Parallel and Distributed Computer Architecture, Adv. VLSI Systems, High Performance Parallel Computing, Digital MOS ICs, Random Signals
Projects: Cache Coherency Protocol Simulator, AbsHDL Design and Formal Verification of Five-Stage Pipelined Processor, Real-Time Data Manipulation with IXPs, Raytracing, VLSI Design of an Arithmetic Logic Unit
Virginia Polytechnic Institute and State University, Blacksburg, VA
Bachelor of Science, Computer Engineering, May 2002
Minor in Mathematics, Minor in Computer Science
Honors: Dean's List: Fall 1999, Spring 2000, Fall 2000; Pratt Engineering Scholar; Gilbert and Lucille Seay Scholar (2 years); member of Eta Kappa Nu Electrical and Computer Engineering National Honor Society; member of Phi Eta Sigma National Honor Society; member of Golden Key International Honor Society; member of the National Society of Collegiate Scholars
Coursework: Embedded System Design, Microprocessor System Design, Digital Design I/II, Operating Systems, Data Structures and Files, Object Oriented Software, Computer Organization
Publications
Contributing author of "Patent Office Litigation", a two-volume set focused on the new contested proceedings under the America Invents Act published October 26, 2012 by Thomson Reuters Westlaw. This book examines how the proceedings interact with other aspects of patent procurement and enforcement, and delivers practical analysis and advice.
D.C. Keezer, J.S. Davis, S. Bezos, D. Minier, M.C. Caron, K. Bergman, O. Liboiron-Ladouceur. "Low-Cost Strategies for Testing Multi-Gigahertz SOPs and Components". 5th Electronics Packaging Technology Conference (IEEE), Singapore, Dec. 2003, pp. 410-414.
D.C. Keezer, J.S. Davis, M. Haris, S. Bezos, D. Minier, M.C. Caron, K. Bergman, O. Liboiron-Ladouceur. "Recent Advances in Low-Cost Multi-Gigahertz Testing". Napa KGD Packaging and Test Workshop, Napa, CA., Sept. 2003, pp. 41.
D.C. Keezer, J.S. Davis, S. Bezos, D. Minier, M.C. Caron, K. Bergman, O. Liboiron-Ladouceur. "Low-Cost Strategies for Testing Multi-Gigahertz SOPs and Components". 5th Electronics Packaging Technology Conference (IEEE), Singapore, Dec. 2003, pp. 410-414.
D.C. Keezer, J.S. Davis, M. Haris, S. Bezos, D. Minier, M.C. Caron, K. Bergman, O. Liboiron-Ladouceur. "Recent Advances in Low-Cost Multi-Gigahertz Testing". Napa KGD Packaging and Test Workshop, Napa, CA., Sept. 2003, pp. 41.
Admissions to Practice
District of Columbia
Court of Appeals, Admitted to Practice July 10, 2009
United States Court of Appeals for the Federal Circuit
Admitted to Practice February 25, 2009
Commonwealth of Virginia
Virginia State Bar, Admitted to Practice June 2, 2008
United States Patent and Trademark Office
Registered Patent Attorney, Admitted to Practice August 17, 2007
Court of Appeals, Admitted to Practice July 10, 2009
United States Court of Appeals for the Federal Circuit
Admitted to Practice February 25, 2009
Commonwealth of Virginia
Virginia State Bar, Admitted to Practice June 2, 2008
United States Patent and Trademark Office
Registered Patent Attorney, Admitted to Practice August 17, 2007