Resume

Experience

Sterne, Kessler, Goldstein & Fox, P.L.L.C. — Washington, D.C.

Director, January 2014 – present · Associate, March 2008 – December 2013 · Student Associate, May 2005 – February 2008

Director in the Electronics Practice Group. More than two decades of experience building robust, enforceable patent portfolios: new applications, replies to office actions, reexamination, appeals, and petitions practice, with regular in-person examiner interviews at the USPTO.
Technologies: user interfaces, financial software, cloud computing, distributed systems, 3D printing, automotive, networking, databases, and computer architecture.
Extensive inter partes review, post-grant review, and reexamination experience before the Patent Trial and Appeal Board, representing patent owners and challengers alike — and drafting prosecution strategy to withstand post-grant scrutiny.
Chair, firm Pro Bono Committee — expanded the firm's pro bono practice into immigration law: habeas petitions reuniting families, U visas for survivors of violence, DACA renewals, and bond hearings for detained immigrants.

George Mason University, Antonin Scalia Law School — Arlington, VA

Adjunct Professor, September 2012 – August 2022

General Dynamics, Advanced Information Systems — Fairfax, VA

Sr. Software Engineer, January 2004 – May 2005

Designed and implemented display software for a tactical control system employed on several classes of US Navy submarines: graphical components, an alerts system, and a communications channel for passive broadband data using CORBA. C++ on Linux. Received the "Excellence Award," January 2005.

Georgia Institute of Technology — Atlanta, GA

Graduate Research Assistant, January 2003 – December 2003 · Graduate Teaching Assistant, August 2002 – December 2002

Taught an introductory computer engineering course in logic design (office hours for 40+ students). As a research assistant, developed high-throughput, short-pulse-width optical data modules with Xilinx FPGA hardware and PECL for high-speed test applications.

Digital System Resources, Inc. — Fairfax, VA

Summer Intern, Systems Engineer, May 2001 – August 2001

Configured, troubleshot, and supported Compaq 8-way SMP units, FDDI networks, and systems running Red Hat Linux, HP-UX, and Solaris. Held Secret security clearance.

George Mason University School of Law — Arlington, VA

Juris Doctor, Intellectual Property Law Track, December 2007

Georgia Institute of Technology — Atlanta, GA

Master of Science, Electrical and Computer Engineering, December 2003

Coursework: Advanced Computer Architecture, Parallel and Distributed Computer Architecture, Advanced VLSI Systems, High Performance Parallel Computing, Digital MOS ICs, Random Signals.
Projects: Cache Coherency Protocol Simulator; AbsHDL Design and Formal Verification of a Five-Stage Pipelined Processor; Real-Time Data Manipulation with IXPs; Raytracing; VLSI Design of an Arithmetic Logic Unit.

Virginia Polytechnic Institute and State University — Blacksburg, VA

Bachelor of Science, Computer Engineering, May 2002 · Minors in Mathematics and Computer Science

Honors: Dean's List (Fall 1999, Spring 2000, Fall 2000); Pratt Engineering Scholar; Gilbert and Lucille Seay Scholar (2 years); Eta Kappa Nu; Phi Eta Sigma; Golden Key International Honour Society; National Society of Collegiate Scholars.
Coursework: Embedded System Design, Microprocessor System Design, Digital Design I/II, Operating Systems, Data Structures and Files, Object Oriented Software, Computer Organization.

The full semester-by-semester schedule is on the Coursework page.

Supreme Court of the United States
United States Court of Appeals for the Federal Circuit — February 25, 2009
District of Columbia Court of Appeals — July 10, 2009
Commonwealth of Virginia (Virginia State Bar) — June 2, 2008
United States Patent and Trademark Office, Registered Patent Attorney — August 17, 2007

American Intellectual Property Law Association — PTAB Trial Committee: Chair, 2022–2024; previously Vice Chair. Contributing drafter of AIPLA comment letters responding to USPTO rulemaking.
Legal Aid Justice Center — Board of Directors
Computer CORE — Board of Directors (former; joined 2016)
Fairfax County Public Schools — Chair, Technology and Engineering Education Advisory Board (former)

Contributing author, Patent Office Litigation, First and Second Editions — a two-volume treatise on the contested proceedings created by the America Invents Act (Thomson Reuters Westlaw; first edition October 26, 2012). The book examines how the proceedings interact with other aspects of patent procurement and enforcement, and delivers practical analysis and advice.
D.C. Keezer, J.S. Davis, S. Bezos, D. Minier, M.C. Caron, K. Bergman, O. Liboiron-Ladouceur. “Low-Cost Strategies for Testing Multi-Gigahertz SOPs and Components”. 5th Electronics Packaging Technology Conference (IEEE), Singapore, Dec. 2003, pp. 410–414.
D.C. Keezer, J.S. Davis, M. Haris, S. Bezos, D. Minier, M.C. Caron, K. Bergman, O. Liboiron-Ladouceur. “Recent Advances in Low-Cost Multi-Gigahertz Testing”. Napa KGD Packaging and Test Workshop, Napa, CA, Sept. 2003, p. 41.

AI Assets at Risk: Protecting AI Innovation Across the U.S. and Brazil — webinar, August 2025
Protecting Your Supply Chain: Cross-Market IP Considerations Between the U.S. and Brazil — webinar, May 2025
Intellectual Property Considerations for Global Mobility Startups — webinar series, March 2025
16th Annual Global Automotive & Mobility Innovation Challenge (GAMIC) Finals — Detroit, April 2024
PTAB and TTAB Challenges — Gaylord National, October 2023
Drafting Considerations to Provide Flexibility in Post Grant Proceedings – EP vs. US — webinar, June 2023
Amendment Practice at the USPTO and EPO Patent Prosecution — New Orleans, May 2022
Recent Trends and Practice Tips Before the PTAB — webinar, February 2022
2021 Virtual Patent Trial and Appeal Board Bench & Bar Conference — August 2021

English, Spanish (fluent)